module DECODE(icode, rA, rB, valA_in, valB_in, CC, srcA, srcB, valA_out, valB_out);

input [3:0] icode;
input [3:0] rA;
input [3:0] rB;

output reg [3:0] srcA;
output reg [3:0] srcB;

input [31:0] valA_in;
input [31:0] valB_in;
input [31:0] CC;

output [31:0] valA_out;
output [31:0] valB_out;

assign valA_out = (icode == 4'ha && rA == 4'h8)?CC: valA_in;
assign valB_out = valB_in;

always @(icode or rA or rB) begin
	case(icode)
		0, 1, 2, 3, 4, 5, 6, 7: begin
			srcA <= rA;
			srcB <= rB;
		end
		8, 9, 11: begin
			srcA <= 4'b100;
			srcB <= 4'b100;
		end
		10: begin
			srcA <= rA;
			srcB <= 4'b100;
		end
	endcase
end

endmodule
